firrtl
Flexible Intermediate Representation for RTL
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최종 버전 다운로드 (.zip)- mergify_config.yml
- bug-report.md
- feature-request.md
- action.yml
- test.yml
- CODEOWNERS
- PULL_REQUEST_TEMPLATE.md
- benchmark_cold_compile.py
- find_heap_bound.py
- monitor_job.py
- package.scala
- PassBenchmark.scala
- SerializationBenchmark.scala
- TransformBenchmark.scala
- package.scala
- firrtl_logo.png
- firrtl_logo.svg
- ExprGen.scala
- ExprGenParams.scala
- ExprState.scala
- FirrtlCompileTests.scala
- FirrtlEquivalenceTest.scala
- GenMonad.scala
- StateGen.scala
- Example.scala
- GenMonad.scala
- JQFFuzz.scala
- JQFRepro.scala
- hello.c
- hello.ll
- alpha.txt
- architecture.05.05.15.txt
- chisel-feedback-7.6.15.txt
- chisel.04.06.15.txt
- chisel.04.13.15.txt
- chisel.05.04.15.txt
- feedbackQA.02.24.15.doc
- feedbackQA.02.24.15.txt
- female-node.txt
- flo.txt
- frontend-notes.04.16.15.txt
- initialize-register-explanation.txt
- memory.txt
- memory_v2.txt
- notes.02.13.15.txt
- notes.02.17.15.txt
- notes.02.18.15.txt
- notes.02.23.15.txt
- notes.03.10.15.txt
- notes.03.16.15.txt
- notes.03.18.15.txt
- primop-inference.txt
- stanza-cheatsheet.txt
- build.properties
- plugins.sbt
- AddNot.fir
- FPU.fir
- HwachaSequencer.fir
- ICache.fir
- Ops.fir
- Rob.fir
- RocketCore.fir
- formal_equiv.sh
- parse_firrtl_transform_log.py
- FIRRTL.g4
- firrtl.proto
- firrtl.options.RegisteredLibrary
- firrtl.options.RegisteredTransform
- logback.xml
- CircuitGraph.scala
- ConnectionGraph.scala
- GetNamespace.scala
- InstanceGraph.scala
- InstanceKeyGraph.scala
- IRLookup.scala
- NodeCount.scala
- SymbolTable.scala
- DuplicationHelper.scala
- CleanupNamedTargets.scala
- EliminateTargetPaths.scala
- Annotation.scala
- AnnotationUtils.scala
- JsonProtocol.scala
- LoadMemoryAnnotation.scala
- MemoryInitAnnotation.scala
- PresetAnnotations.scala
- Target.scala
- TargetToken.scala
- TargetUtils.scala
- RtlilEmitter.scala
- DefRandom.scala
- InvalidToRandomPass.scala
- UndefinedMemoryBehaviorPass.scala
- Btor2Serializer.scala
- FirrtlExpressionSemantics.scala
- FirrtlToTransitionSystem.scala
- SMTCommand.scala
- SMTEmitter.scala
- SMTExpr.scala
- SMTExprMap.scala
- SMTExprSerializer.scala
- SMTLibSerializer.scala
- SMTTransitionSystemEncoder.scala
- StutteringClockTransform.scala
- TransitionSystem.scala
- UninterpretedModuleAnnotation.scala
- FirrtlEmitter.scala
- ProtoBufEmitter.scala
- LegalizeVerilog.scala
- MinimumVerilogEmitter.scala
- SystemVerilogEmitter.scala
- VerilogEmitter.scala
- CheckResets.scala
- Constraint.scala
- ConstraintSolver.scala
- Inequality.scala
- IsAdd.scala
- IsFloor.scala
- IsKnown.scala
- IsMax.scala
- IsMin.scala
- IsMul.scala
- IsNeg.scala
- IsPow.scala
- IsVar.scala
- LetterCaseTransform.scala
- DiGraph.scala
- EdgeData.scala
- EulerTour.scala
- RenderDiGraph.scala
- IR.scala
- Serializer.scala
- StructuralHash.scala
- AddDefaults.scala
- Checks.scala
- ConvertLegacyAnnotations.scala
- DeletedWrapper.scala
- GetIncludes.scala
- WriteOutputAnnotations.scala
- DependencyManager.scala
- Exceptions.scala
- ExitCodes.scala
- OptionParser.scala
- OptionsView.scala
- package.scala
- Phase.scala
- Registration.scala
- Shell.scala
- Stage.scala
- StageAnnotations.scala
- StageOptions.scala
- StageUtils.scala
- Listener.scala
- ClockList.scala
- ClockListTransform.scala
- ClockListUtils.scala
- RemoveAllButClocks.scala
- CreateMemoryAnnotations.scala
- DumpMemoryAnnotations.scala
- InferReadWrite.scala
- MemConf.scala
- MemIR.scala
- MemLibOptions.scala
- MemTransformUtils.scala
- MemUtils.scala
- RenameAnnotatedMemoryPorts.scala
- ReplaceMemMacros.scala
- ReplaceMemTransform.scala
- ResolveMaskGranularity.scala
- ResolveMemoryReference.scala
- SeparateWriteClocks.scala
- SetDefaultReadUnderWrite.scala
- ToMemIR.scala
- VerilogMemDelays.scala
- YamlUtils.scala
- Wiring.scala
- WiringTransform.scala
- WiringUtils.scala
- CheckChirrtl.scala
- CheckFlows.scala
- CheckHighForm.scala
- CheckInitialization.scala
- CheckTypes.scala
- CheckWidths.scala
- CInferMDir.scala
- CommonSubexpressionElimination.scala
- ConvertFixedToSInt.scala
- ExpandConnects.scala
- ExpandWhens.scala
- InferBinaryPoints.scala
- InferTypes.scala
- InferWidths.scala
- Inline.scala
- LegalizeConnects.scala
- LowerTypes.scala
- PadWidths.scala
- Pass.scala
- PullMuxes.scala
- RemoveAccesses.scala
- RemoveCHIRRTL.scala
- RemoveEmpty.scala
- RemoveIntervals.scala
- RemoveValidIf.scala
- ReplaceAccesses.scala
- ResolveFlows.scala
- ResolveKinds.scala
- SplitExpressions.scala
- ToWorkingIR.scala
- TrimIntervals.scala
- Uniquify.scala
- VerilogModulusCleanup.scala
- VerilogPrep.scala
- ZeroLengthVecs.scala
- ZeroWidth.scala
- FromProto.scala
- ToProto.scala
- AddCircuit.scala
- AddDefaults.scala
- AddImplicitEmitter.scala
- AddImplicitOutputFile.scala
- CatchExceptions.scala
- Checks.scala
- Compiler.scala
- ConvertCompilerAnnotations.scala
- DriverCompatibility.scala
- CatchCustomTransformExceptions.scala
- CheckScalaVersion.scala
- Compiler.scala
- ExpandPrepares.scala
- TrackTransforms.scala
- UpdateAnnotations.scala
- WrappedTransform.scala
- FirrtlAnnotations.scala
- FirrtlCli.scala
- FirrtlCompilerTargets.scala
- FirrtlOptions.scala
- FirrtlStage.scala
- FirrtlStageUtils.scala
- Forms.scala
- package.scala
- TransformManager.scala
- AssertSubmoduleAssumptions.scala
- ConvertAsserts.scala
- RemoveVerificationStatements.scala
- BlackBoxSourceHelper.scala
- CheckCombLoops.scala
- CombineCats.scala
- ConstantPropagation.scala
- CustomRadixTransform.scala
- DeadCodeElimination.scala
- Dedup.scala
- DedupAnnotations.scala
- EnsureNamedStatements.scala
- FixAddingNegativeLiteralsTransform.scala
- Flatten.scala
- FlattenRegUpdate.scala
- GroupComponents.scala
- IdentityTransform.scala
- InferResets.scala
- InlineAcrossCastsTransform.scala
- InlineBitExtractions.scala
- InlineBooleanExpressions.scala
- LegalizeClocksAndAsyncResets.scala
- LegalizeReductions.scala
- ManipulateNames.scala
- MustDedup.scala
- OptimizationAnnotations.scala
- package.scala
- PropagatePresetAnnotations.scala
- RemoveKeywordCollisions.scala
- RemoveReset.scala
- RemoveWires.scala
- RenameModules.scala
- ReplaceTruncatingArithmetic.scala
- SimplifyMems.scala
- SortModules.scala
- TopWiring.scala
- Foreachers.scala
- BackendCompilationUtilities.scala
- ClassUtils.scala
- TestOptions.scala
- AddDescriptionNodes.scala
- Compiler.scala
- DependencyAPIMigration.scala
- EmissionOption.scala
- Emitter.scala
- FileUtils.scala
- FirrtlException.scala
- Implicits.scala
- LexerHelper.scala
- LoweringCompilers.scala
- Mappers.scala
- Namespace.scala
- package.scala
- Parser.scala
- PrimOps.scala
- RenameMap.scala
- Utils.scala
- Visitor.scala
- WIR.scala
- AddDefaults.scala
- Checks.scala
- Logger.scala
- LoggerAnnotations.scala
- LoggerOptions.scala
- package.scala
- AnalyzeCircuit.scala
- AnalyzeCircuit.scala
- SampleAnnotations.anno.json
- AdderExtModule.v
- LargeParam.v
- LargeParamTester.fir
- MultiExtModuleTester.fir
- ParameterizedExtModule.v
- ParameterizedExtModuleTester.fir
- ParameterizedViaHeaderAdderExtModule.v
- RenamedExtModuleTester.fir
- SimpleExtModule.v
- SimpleExtModuleTester.fir
- VerilogHeaderFile.vh
- AsyncResetTester.fir
- ChirrtlMems.fir
- CustomTransform.fir
- EmptyChirrtlMem.fir
- HasDeadCode.fir
- HasLoops.fir
- NestedSubAccessTester.fir
- NodeType.fir
- PresetTester.fir
- Printf.fir
- ZeroPortMem.fir
- ZeroWidthMem.fir
- testTop.cpp
- firrtl.options.RegisteredLibrary
- firrtl.options.RegisteredTransform
- ExpandWhens.fir
- Legalize.fir
- CanTop.fir
- RotationCordic.fir
- integration
- regress
- SymbolTableSpec.scala
- RtlilCompilationTest.scala
- RtlilEquivalenceTest.scala
- AssertAssumeStopSpec.scala
- AsyncResetSpec.scala
- EndToEndSMTSpec.scala
- MemorySpec.scala
- RequiresZ3.scala
- SMTCompilationTest.scala
- UndefinedFirrtlSpec.scala
- UninterpretedModulesSpec.scala
- InvalidToRandomSpec.scala
- UndefinedMemoryBehaviorSpec.scala
- Btor2Spec.scala
- FirrtlExpressionSemanticsSpec.scala
- FirrtlModuleToTransitionSystemSpec.scala
- FirrtlToTransitionSystemPassSpec.scala
- SMTBackendHelpers.scala
- SMTLibSpec.scala
- StructuralHashSpec.scala
- LowerTypesSpec.scala
- ConvertCompilerAnnotationsSpec.scala
- DriverCompatibilitySpec.scala
- CurrentFirrtlStateAnnotationSpec.scala
- FirrtlSpec.scala
- LeanTransformSpec.scala
- PassTests.scala
- EnsureNamedStatementsSpec.scala
- JsonProtocolSpec.scala
- RenameMapPrivateSpec.scala
- CircuitGraphSpec.scala
- ConnectionGraphSpec.scala
- InstanceGraphTests.scala
- InstanceKeyGraphSpec.scala
- IRLookupSpec.scala
- AnnotationSpec.scala
- CleanupNamedTargetsSpec.scala
- EliminateTargetPathsSpec.scala
- JsonProtocolSpec.scala
- LoadMemoryAnnotationSpec.scala
- MorphismSpec.scala
- TargetDirAnnotationSpec.scala
- TargetSpec.scala
- TargetUtilsSpec.scala
- UnrecognizedAnnotationSpec.scala
- InequalitySpec.scala
- ExecutionTestHelper.scala
- ParserHelpers.scala
- SimpleExecutionTest.scala
- VerilogExecution.scala
- LetterCaseTransformSpec.scala
- FixedPointMathSpec.scala
- FixedSerializationSpec.scala
- FixedTypeInferenceSpec.scala
- RemoveFixedTypeSpec.scala
- AssertSubmoduleAssumptionsSpec.scala
- ConvertAssertsSpec.scala
- RemoveVerificationStatementsSpec.scala
- VerificationSpec.scala
- DiGraphTests.scala
- EulerTourTests.scala
- IntervalMathSpec.scala
- IntervalSpec.scala
- AddDefaultsSpec.scala
- ChecksSpec.scala
- GetIncludesSpec.scala
- WriteOutputAnnotationsSpec.scala
- OptionParserSpec.scala
- OptionsViewSpec.scala
- PhaseManagerSpec.scala
- RegistrationSpec.scala
- ShellSpec.scala
- InferTypesFlowsAndKindsSpec.scala
- RemoveAccessesSpec.scala
- AddCircuitSpec.scala
- AddDefaultsSpec.scala
- AddImplicitEmitterSpec.scala
- AddImplicitOutputFileSpec.scala
- ChecksSpec.scala
- CompilerSpec.scala
- FirrtlCliSpec.scala
- FirrtlMainSpec.scala
- FirrtlOptionsViewSpec.scala
- BlackBoxSourceHelperSpec.scala
- CombineCatsSpec.scala
- CustomRadixTransformSpec.scala
- DedupTests.scala
- GroupComponentsSpec.scala
- InferWidthsWithAnnosSpec.scala
- LegalizeClocksAndAsyncResets.scala
- LegalizeReductions.scala
- ManipulateNamesSpec.scala
- MustDedupSpec.scala
- RemoveResetSpec.scala
- SortModulesSpec.scala
- TopWiringTest.scala
- AnnotationTests.scala
- AsyncResetSpec.scala
- AttachSpec.scala
- CheckCombLoopsSpec.scala
- CheckInitializationSpec.scala
- CheckSpec.scala
- ChirrtlMemSpec.scala
- ChirrtlSpec.scala
- CInferMDirSpec.scala
- ClockListTests.scala
- CompilerTests.scala
- CompilerUtilsSpec.scala
- ConstantPropagationTests.scala
- CustomTransformSpec.scala
- DCETests.scala
- ExpandWhensSpec.scala
- ExtModuleSpec.scala
- ExtModuleTests.scala
- FeatureSpec.scala
- FileUtilsSpec.scala
- FlattenTests.scala
- InferReadWriteSpec.scala
- InferResetsSpec.scala
- InfoSpec.scala
- InlineAcrossCastsSpec.scala
- InlineBooleanExpressionsSpec.scala
- InlineInstancesTests.scala
- IntegrationSpec.scala
- LegalizeSpec.scala
- LoFirrtlOptimizedEmitterTests.scala
- LowerTypesSpec.scala
- MemEnFeedbackSpec.scala
- MemLatencySpec.scala
- MemoryInitSpec.scala
- MemSpec.scala
- MultiThreadingSpec.scala
- MutableRenameMapSpec.scala
- NamespaceSpec.scala
- NegSpec.scala
- PadWidthsTests.scala
- ParserSpec.scala
- PresetRegAnnotationSpec.scala
- PresetSpec.scala
- ProtoBufSpec.scala
- RegisterUpdateSpec.scala
- RemoveWiresSpec.scala
- ReplaceAccessesSpec.scala
- ReplaceTruncatingArithmeticSpec.scala
- ReplSeqMemTests.scala
- SeparateWriteClocksSpec.scala
- SerializerSpec.scala
- SimplifyMemsSpec.scala
- StringSpec.scala
- UniquifySpec.scala
- UnitTests.scala
- UtilsSpec.scala
- VerilogEmitterTests.scala
- VerilogEquivalenceSpec.scala
- VerilogMemDelaySpec.scala
- WidthSpec.scala
- WiringTests.scala
- ZeroLengthVecsSpec.scala
- ZeroWidthTests.scala
- LoggerSpec.scala
- GCDTester.fir
- GCDTester.pb
- MemTester.fir
- PipeTester.fir
- RightShiftTester.fir
- firrtl
- firrtl-profiling
- .gitignore
- .install_verilator.sh
- .install_yosys.sh
- .install_z3.sh
- .mergify.yml
- .run_formal_checks.sh
- .scalafmt.conf
- _config.yml
- build.sbt
- build.sc
- LICENSE.apache
- Makefile
- README.md
- root-doc.txt
# 설치 가이드
1. 코드 내려받기
git clone https://github.com/chipsalliance/firrtl
깃허브에서 프로젝트 코드 전체를 내 컴퓨터로 내려받습니다.
cd firrtl
방금 내려받은 프로젝트 폴더 안으로 이동합니다.
2. Make
보통 추천사전 준비물
- Git GitHub에서 프로젝트 코드를 내려받으려면 필요합니다.
- Make Linux/macOS는 보통 기본 설치되어 있습니다. Windows는 별도 설치(예: MSYS2, WSL)가 필요합니다.
make
생성된 빌드 설정을 바탕으로 실제 컴파일을 진행해 실행 파일을 만듭니다.
에러 없이 끝나면 성공입니다. 생성된 실행 파일을 직접 실행해보세요.
// repository documentation
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