CPU-on-Vivado-HLS

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CPU-on-Vivado-HLS

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A simple MIPS-like CPU demo in C++ for Xilinx Vivado HLS

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# CPU on Vivado HLS
### A simple MIPS-like CPU demo in C++ for Xilinx Vivado HLS

Nowadays, tools like Xilinx’s Vivado HLS let us synthesize hardware code from high level languages. Such tools were designed to speed up the development on FPGA projects and to enable porting codes form languages like C++ to the hardware.

In this project I developed some basic parts of a MIPS-like CPU in a C++ for use with the Vivado HLS tool. The end result looks like a CPU simulator. I developed this project, when I was an undergraduate student, as an assignment for the Computer Architecture course at [Technical University of Crete](https://www.tuc.gr).

This demo CPU features an Out-of-Order command execution by implementing the Tomasulo's algorithm. I tested the CPU by running simple custom programs which were executed with correct results.

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## Documentation

[Project's Files](Files.md)

[Testing the CPU](Testing.md)

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![img](https://raw.githubusercontent.com/GramThanos/CPU-on-Vivado-HLS/master/docs/cpu-units-block-diagram.png)

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### License

This project is under [The MIT license](https://opensource.org/licenses/MIT).
I do although appreciate attribute.

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[![GramThanos](https://avatars2.githubusercontent.com/u/14858959?s=42&v=4)](https://github.com/GramThanos)

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