HDL-Coder-Evaluation-Reference-Guide

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HDL-Coder-Evaluation-Reference-Guide

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Getting started guide for learning and evaluating HDL Coder

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# HDL-Coder-Evaluation-Reference-Guide
[![Open in MATLAB Online](https://www.mathworks.com/images/responsive/global/open-in-matlab-online.svg)](https://matlab.mathworks.com/open/github/v1?repo=mathworks/HDL-Coder-Evaluation-Reference-Guide&project=https://github.com/mathworks/HDL-Coder-Evaluation-Reference-Guide/blob/main/Examples/HdlExampleMenu.prj) 
[![View HDL Coder Evaluation Reference Guide on File Exchange](https://www.mathworks.com/matlabcentral/images/matlab-file-exchange.svg)](https://www.mathworks.com/matlabcentral/fileexchange/58941-hdl-coder-evaluation-reference-guide)

Guidelines for getting started using HDL Coder to generate VHDL or Verilog to target FPGA or ASIC hardware. The document provides practical guidance for:
* Setting up your MATLAB algorithm or Simulink model for HDL code generation
* How to create HDL-ready Simulink models, Stateflow charts, and MATLAB Function blocks
* Tips and advanced techniques for HDL code generation
* Code generation settings for specific FPGA/SoC targets, including AXI interfaces
* Converting to fixed-point or utilizing native floating-point
* Optimizing for various goals and targets
* Verifying your generated code

Examples are included to illustrate selected concepts.

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