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innova2_experiments

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Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board

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# Innova-2 Experiments

Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board.

## RISC-V

[riscv_rocket64b4l2w_xdma](riscv_rocket64b4l2w_xdma) - RISC-V 64-Bit 4-Core with 512KB Level 2 Cache and Wide 256-bit Memory Bus

## XDMA UART to UART

[xdma_uart-to-uart](xdma_uart-to-uart) - PCIe XDMA with two UARTs Connected Together for Testing UART over XDMA

## XDMA Stream

[xdma_stream](xdma_stream) - PCIe XDMA to AXI-Stream with Floating-Point and AXI-Lite to BRAM and GPIO

## XDMA Stream 512-Bit

[xdma_stream_512bit](xdma_stream_512bit) - PCIe XDMA to 512-Bit Wide AXI4-Stream for Floating-Point Calculations

## QDMA

[qdma_2021_1](qdma_2021_1) - Minimal PCIe [QDMA](https://www.xilinx.com/products/intellectual-property/pcie-qdma.html) demonstration

## Slow Clock Tests

[slow_clock_tests](slow_clock_tests) - [XDMA](https://www.xilinx.com/products/intellectual-property/pcie-dma.html)-based design for testing the [Clocking Wizard](https://docs.xilinx.com/r/en-US/pg065-clk-wiz)

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